ADVANCING GaN DESIGN THROUGH INVESTMENTS IN MICROELECTRONICS SOLUTIONS

The CA DREAMS and MMEC Hubs of the Microelectronics Commons program are announcing a GaN Prototype Accelerator Multi-Project Wafer (GaNPA MPW) Opportunity.  The GaNPA MPW Opportunity is designed to attract a broad spectrum of GaN power amplifier designers – both traditional and non-traditional – and stimulate innovation through a structured, mission-focused design exercise competition. For this initial Opportunity CA DREAMS and MMEC are partnering with the Northrop Grumman Microelectronics Center for access to their GaN15 PDK. The initiative will seek successful proposals that:

• Lower barriers of entry to advanced GaN Technology

• Engage with traditional and non-traditional GaN amplifier circuit designers

• Foster domestic design and fabrication capability

• Enable rigorous RF design practices
• Provide a secure solution source for the benefit of National Security

On June 19th, during the 2025 International Microwave Symposium, the CA DREAMS and MMEC teams will host an Industry Day for the Commons GaN Prototype Accelerator MPW Opportunity. This session will provide information on the opportunity including MOSIS 2.0 MPW services, EDA tool access, and the Northrop Grumman Microelectronics Center GaN15 PDK.  The white paper submission process and selection criteria will also be outlined.

Up to 12 designs efforts will be selected. Designers will have one month to submit a white paper. Selections will be announced by July 31, 2025.

Selected teams will then have one month to:

• Enroll in MOSIS 2.0 via CA DREAMS
• Complete required NDAs with Northrop Grumman Manufacturing Center
• Set up EDA tool access through MMEC DESIGN

Designers will have two months to complete their circuit designs, which must be submitted to MOSIS 2.0 for DRC and mask aggregation. Tapeout is scheduled for December 1, 2025. NGMC will fabricate the circuits and deliver die and lot PCM data by May 1, 2026.

Participants must evaluate PA performance and submit a final report comparing measurements to simulations. The report must include:

• Full design data (schematics, test benches, simulation plots, GDS-II layout)
• Tool and PDK versions used
• Commentary on lessons learned (e.g., using MOSIS 2.0, DESIGN, foundry PDK/process)